1. Field of the Invention
The present invention relates to an image processing method and apparatus and, more particularly, to motion detection processing of an input image signal.
2. Related Background Art
Along with recent trends toward smaller, multimedia-oriented computers, display devices in computers have remarkably advanced. As display devices, liquid crystal display devices have been popularly used. As one of such display devices, a display device using a ferroelectric liquid crystal display device (to be abbreviated as an FLCD hereinafter) is known.
As a feature of the FLCD, a high-definition display device with a large screen is achieved. However, since a liquid crystal element itself is a binary device which cannot change the transmittance of light in an analog manner, pseudo gradation levels are expressed by combinations of ON and OFF dots upon displaying a full-color image or the like. That is, digital halftone processing must be performed to reproduce a halftone image.
Since it is difficult to display data on a large screen at a rate of 30 frames per second or more, only a portion in which motion is detected in a frame must be rewritten by utilizing the memory characteristics as the feature of the FLCD. For this purpose, a portion including motion in an image must be detected. Conventionally, the following method of detecting motion is used.
FIG. 1 is a block diagram of an image processing apparatus for an FLCD, which is adapted to display an analog image signal supplied from a computer on a FLCD and includes a motion detection circuit.
Referring to FIG. 1, an analog image signal output from a computer (not shown) is converted by an A/D converter 1 into a digital signal having a predetermined number of gradation levels, e.g., a 24-bit digital signal (8 bits for each of R, G, and B colors).
A gradation conversion circuit 2 converts the R, G, and B digital signals output from the A/D converter 1 into a digital signal having a number of resolution levels that can be displayed by a display device 7, e.g., a 3-bit digital signal (1 bit for each of R, G, and B colors) by known digital halftone processing such as the dither method, the error diffusion method, or the like. The digital signal output from the gradation conversion circuit 2 is stored in a binary frame memory 5.
In additon, the digital signal output from the A/D converter 1 is input to a motion detector 9. The motion detection 9 is described in detail below.
FIG. 2 is a block diagram showing the motion detector 9.
Referring to FIG. 2, the image signal input from the A/D converter 1 is stored in a line buffer 901 having a predetermined capacity for K pixels. As shown in FIG. 2, the line buffer is designed to store K pixels, and pixel data stored in the line buffer are subjected to weighted mean processing given by equation (1) below via a multiplier 902, an adder 903, and an accumulator 904 so as to be converted into a feature value S.sub.t corresponding to a set of K pixels: ##EQU1##
where w.sub.i is a weighting coefficient determined in advance by a predetermined method, and an image which is being processed is assumed to belong to the t-th frame. Subsequently, the calculated feature amount S.sub.t is compared with a feature amount S.sub.t-1 which was calculated based on image data of the previous frame and was stored in a feature amount memory 10 in FIG. 1, by a comparison controller 905. In this case, a difference .DELTA.S as the comparison result is compared with a predetermined threshold value T, and if the following inequality holds, it is determined that motion is detected from the corresponding line portion, and the line address of the pixels at that time is output to a frame memory control circuit 4 (FIG. 1): EQU .DELTA.S=S.sub.t -S.sub.t-1 &gt;T (2)
Note that the line address is the start address of K successive pixels.
The above-mentioned motion detection processing is performed in units of R, G, and B colors, and the calculated feature amount is newly stored in the feature amount memory 10. The frame memory control circuit 4 outputs data of the motion-detected line from the digital signal (1 bit for each of R, G, and B colors) stored in the binary frame memory 5 on the basis of the address information output from the motion detector 9. With the above-mentioned processing, continuous analog image signals are converted into signals having a predetermined number of gradation levels, and motion between adjacent frames is detected to partially rewrite an image to be displayed, thus realizing an image display operation in real time.
However, in the above-mentioned prior art, in order to attain motion detection, the feature amount obtained from image data of the previous frame must be stored in the feature amount memory 10.
In particular, since the screen size has been increasing in recent years, the capacity required for the feature amount memory is also increasing, resulting in an increase in cost of the apparatus.
Upon execution of motion detection, binary pixel data may be directly compared with each other without calculating any feature amount. However, in this case, if an image signal includes noise from the transmission route, a binary image bit is easily inverted, resulting in a detection error.